Xilinx Hiring Freshers as Design Engineer in Across India on August 2013
Experience: Freshers
Qualification: BE,B.Tech
Location: Across India
Salary: As Per Industry
Hspice simulations on key circuit designs.
Static Timing analysis using Prime-time and Nano-time
Power bus EM/IR analysis using Totem
Cadence Virtuoso Custom Layout integration
Sign-off checks and full-chip level functional verification
Being the reference resource for the entire team
Apply Mode: Online
